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XC5VLX50T-1FFG1136C 480 I/O Xilinx Virtex 5

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XC5VLX50T-1FFG1136C 480 I/O Xilinx Virtex 5

Name: XC5VLX50T1FFG1136C 480 IO Xilinx Virtex 5
Brand: Xilinx Inc.
Price: 600 USD

Brand Name : Xilinx Inc.

Model Number : XC5VLX50T-1FFG1136C

Certification : Lead free / RoHS Compliant

MOQ : 1 pcs

Price : USD 600~1000 pcs

Payment Terms : T/T, Western Union, Paypal, Trade Assurance, Credit Card

Supply Ability : 186 pcs

Delivery Time : 3-5 Day

Packaging Details : International Standard Packaging

Category : Programmable Logic ICs

Condition : Original 100%,Brand New and Original,New

Number of I/Os : 480 I/O

Product : Virtex-5

Package / Case : FBGA-1136

Distributed RAM : 480 kbit

Embedded Block RAM - EBR : 2160 kbit

Maximum Operating Frequency : 550 MHz

Service : BOM Kitting

Lead time : In Stock,contact us

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XC5VLX50T-1FFG1136C IC FPGA FBGA-1136 480 I/O Virtex-5 550 MHz

Product Attribute	Attribute Value
Manufacturer:	Xilinx
Product Category:	FPGA - Field Programmable Gate Array
Product:	Virtex-5
Number of I/Os:	480 I/O
Operating Supply Voltage:	1 V
Minimum Operating Temperature:	0 C
Maximum Operating Temperature:	+ 85 C
Mounting Style:	SMD/SMT
Package / Case:	FBGA-1136
Data Rate:	6.5 Gb/s
Series:	XC5VFX70T
Brand:	Xilinx
Distributed RAM:	480 kbit
Embedded Block RAM - EBR:	2160 kbit
Maximum Operating Frequency:	550 MHz
Moisture Sensitive:	Yes
Number of Transceivers:	12 Transceiver
Product Type:	FPGA - Field Programmable Gate Array
Factory Pack Quantity:	1
Subcategory:	Programmable Logic ICs
Tradename:	Virtex

Summary of Virtex-5 FPGA Features

A Virtex-5 FPGA CLB resource is made up of two slices.
Each slice is equivalent and contains:
• Four function generators
• Four storage elements
• Arithmetic logic gates
• Large multiplexers
• Fast carry look-ahead chain

The function generators are configurable as 6-input LUTs or dual-output 5-input LUTs. SLICEMs in some CLBs can be
configured to operate as 32-bit shift registers (or 16-bit x 2 shift registers) or as 64-bit distributed RAM. In addition, the
four storage elements can be configured as either edge-triggered D-type flip-flops or level sensitive latches.
Each CLB has internal fast interconnect and connects to a switch matrix to access general routing resources.

• Most advanced, high-performance, optimal-utilization, FPGA fabric
− Real 6-input look-up table (LUT) technology
− Dual 5-LUT option
− Improved reduced-hop routing
− 64-bit distributed RAM option
− SRL32/Dual SRL16 option

• Powerful clock management tile (CMT) clocking
− Digital Clock Manager (DCM) blocks for zero delay buffering, frequency synthesis, and clock phase shifting
− PLL blocks for input jitter filtering, zero delay buffering, frequency synthesis, and phase-matched clock division

XC5VLX50T-1FFG1136C 480 I/O Xilinx Virtex 5

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XC5VLX50T-1FFG1136C 480 I/O Xilinx Virtex 5

XC5VLX50T-1FFG1136C 480 I/O Xilinx Virtex 5

XC5VLX50T-1FFG1136C

480 I/O IC FPGA

480 I/O xilinx virtex 5

XC5VLX50T-1FFG1136C 480 I/O Xilinx Virtex 5 Images